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Incomputing, abarrel shifter is acombinational logic circuit that canshift adata word by a variable number ofbit positions as specified by a binary input value. It may zero the vacated bits of the output word and thus perform a logical shift operation (e.g.,logical shift left), or it may rotate all bits of the input word, either by design or as specified by one or more function select inputs.
A barrel shifter is often used to shift and rotate words in microprocessors,[1] typically within a singleclock cycle.
For example, consider a four-bit barrel shifter, with inputs A, B, C and D. The shifter can cycle the order of the bitsABCD asDABC,CDAB, orBCDA; in this case, no bits are lost. That is, it can shift all of the outputs up to three positions to the right (and thus make any cyclic combination of A, B, C and D). The barrel shifter has a variety of applications, including being a useful component inmicroprocessors (alongside theALU).
One way to implement a barrel shifter is as a sequence ofmultiplexers where the output of one multiplexer is connected to the input of the next multiplexer in a way that depends on the shift distance.
The fastest shifters are implemented as full crossbars, in a manner similar to the 4-bit shifter depicted above, only larger. These incur the least delay, with the output always a single gate delay behind the input to be shifted (after allowing the small time needed for the shift count decoder to settle; this penalty is only incurred when the shift count changes). These crossbar shifters require howevern2 gates forn-bit shifts. Because of this, the barrel shifter is often implemented as a cascade of parallel 2×1 multiplexers instead, which allows a large reduction in gate count, now growing only withn logn; the propagation delay is larger, growing with logn (instead of being constant as with the crossbar shifter).
For an 8-bit barrel shifter, two intermediate signals are used which shifts by four and two bits, or passes the same data, based on the value of S[2] and S[1]. This signal is then shifted by another multiplexer, which is controlled by S[0]:
int1 = IN , if S[2] == 0 = IN << 4, if S[2] == 1 int2 = int1 , if S[1] == 0 = int1 << 2, if S[1] == 1 OUT = int2 , if S[0] == 0 = int2 << 1, if S[0] == 1
Larger barrel shifters have additional stages.
The cascaded shifter has the further advantage over the full crossbar shifter of not requiring any decoding logic for the shift count.
The number of multiplexers required for ann-bit word is.[2] Five commonword sizes and the number of multiplexers needed are listed below:
Cost of critical path inFO4 (estimated, without wire delay):
A common usage of a barrel shifter is in the hardware implementation offloating-point arithmetic. For a floating-point add or subtract operation, thesignificands of the two numbers must be aligned, which requires shifting the smaller number to the right, increasing itsexponent, until it matches the exponent of the larger number. This is done by subtracting the exponents and using the barrel shifter to shift the smaller number to the right by the difference, in one cycle.