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 | man pages section 3: Basic Library Functions Oracle Solaris 11 Information Library |
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| man pages section 3: Basic Library Functions Oracle Solaris 11 Information Library |
enable_extended_FILE_stdio(3C)
posix_spawnattr_getschedparam(3C)
posix_spawnattr_getschedpolicy(3C)
posix_spawnattr_getsigdefault(3C)
posix_spawnattr_getsigignore_np(3C)
posix_spawnattr_getsigmask(3C)
posix_spawnattr_setschedparam(3C)
posix_spawnattr_setschedpolicy(3C)
posix_spawnattr_setsigdefault(3C)
posix_spawnattr_setsigignore_np(3C)
posix_spawnattr_setsigmask(3C)
posix_spawn_file_actions_addclose(3C)
posix_spawn_file_actions_addclosefrom_np(3C)
posix_spawn_file_actions_adddup2(3C)
posix_spawn_file_actions_addopen(3C)
posix_spawn_file_actions_destroy(3C)
posix_spawn_file_actions_init(3C)
pthread_attr_getdetachstate(3C)
pthread_attr_getinheritsched(3C)
pthread_attr_getschedparam(3C)
pthread_attr_getschedpolicy(3C)
pthread_attr_setdetachstate(3C)
pthread_attr_setinheritsched(3C)
pthread_attr_setschedparam(3C)
pthread_attr_setschedpolicy(3C)
pthread_barrierattr_destroy(3C)
pthread_barrierattr_getpshared(3C)
pthread_barrierattr_setpshared(3C)
pthread_condattr_getpshared(3C)
pthread_condattr_setpshared(3C)
pthread_cond_reltimedwait_np(3C)
pthread_key_create_once_np(3C)
pthread_mutexattr_getprioceiling(3C)
pthread_mutexattr_getprotocol(3C)
pthread_mutexattr_getpshared(3C)
pthread_mutexattr_getrobust(3C)
pthread_mutexattr_setprioceiling(3C)
pthread_mutexattr_setprotocol(3C)
pthread_mutexattr_setpshared(3C)
pthread_mutexattr_setrobust(3C)
pthread_mutex_getprioceiling(3C)
pthread_mutex_reltimedlock_np(3C)
pthread_mutex_setprioceiling(3C)
pthread_rwlockattr_destroy(3C)
pthread_rwlockattr_getpshared(3C)
pthread_rwlockattr_setpshared(3C)
pthread_rwlock_reltimedrdlock_np(3C)
pthread_rwlock_reltimedwrlock_np(3C)
pthread_rwlock_timedrdlock(3C)
pthread_rwlock_timedwrlock(3C)
rctlblk_get_enforced_value(3C)
- make modified instructions executable
voidsync_instruction_memory(caddr_taddr,intlen);
Thesync_instruction_memory() function performs whatever steps are required to make instructions modifiedby a program executable.
Some processor architectures, including some SPARC processors, have separate and independentinstruction and data caches which are not kept consistent by hardware. For example, if the instruction cache contains an instruction from some address andthe program then stores a new instruction at that address, the newinstruction may not be immediately visible to the instruction fetch mechanism. Software mustexplicitly invalidate the instruction cache entries for new or changed mappings ofpages that might contain executable instructions. Thesync_instruction_memory() function performs this function,and/or any other functions needed to make modified instructions betweenaddr andaddr+len visible. A program should callsync_instruction_memory() after modifying instructions and beforeexecuting them.
On processors with unified caches (one cache for both instructions and data)and pipelines which are flushed by a branch instruction, such as thex86 architecture, the function may do nothing and just return.
The changes are immediately visible to the thread callingsync_instruction_memory() when thecall returns, even if the thread should migrate to another processor duringor after the call. The changes become visible to other threads in thesame manner that stores do; that is, they eventually become visible, butthe latency is implementation-dependent.
The result of executingsync_instruction_memory() are unpredictable ifaddr throughaddr+len-1 arenot valid for the address space of the program making the call.
No values are returned.
Seeattributes(5) for descriptions of the following attributes:
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